Low-voltage Highly-linear Transconductor Design in Subthreshold Cmos
نویسندگان
چکیده
We present four circuits implemented in subthreshold CMOS which greatly increase the linear range over the basic di erential pair. These circuits are appropriate for low voltage applications since there is no stacking of saturated transistors. The rst circuit topology employs multiple asymmetric di erential pairs. The second is a symmetric \bump" transconductor. The remaining two use source degeneration via double di usors. These circuits are analyzed and optimized using a symbolic simulation package and veri ed in T-SPICE. A linear range of 49mV is demonstrated for the two most complex transconductor designs using a 2-Volt supply.
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